Compare moats
Up to three covered companies, band by band. Every call is a curated editorial judgment, never a disclosed figure — and every band carries its cited basis.
| Advantest | ASE Technology Holding | Marvell Technology | |
|---|---|---|---|
| Moat rating | wide A disclosed share that rose while margin expanded. The FY2025 Annual Securities Report and Business Report (84th term, filed 2026-06-26) lists as FY2025 progress: 'Further expanded our market share in the semiconductor tester (ATE) market (CY2024: 58%; CY2025: 65%)', earned on net sales of ¥1,128,610 million at an operating income to net sales ratio of 44.2%, 'an increase of 14.9 percentage points from the previous fiscal year'. The share is a company metric and the filing says so — 'the ratio of Advantest's semiconductor tester sales to the overall size of the semiconductor tester market', where 'The semiconductor tester market size is estimated independently by Advantest based on certain assumptions and available information'. The same filing names seven principal tester competitors (Teradyne, Inc., CCTech, Accotest, YC Corp., Cohu, Inc., UniTest Co., Ltd. and EXICON Ltd.), so this is a lead held against a named field rather than an empty one. | narrow The FY2025 20-F argues ASEH out-competes IDM in-house lines because serving "a large base of customers across a wide range of products" lets it "reduce costs and shorten production cycles through high-capacity utilization and process expertise" and gives its equipment "a longer useful life" — a real but bounded edge, since the same filing calls the global packaging and testing market "highly competitive", notes "most of our customers obtain services from more than one source", flags foundry encroachment ("TSMC has offered advanced packaging technologies such as integrated fan-out"), and warns that "some of our competitors may have superior financial, marketing, manufacturing, research and development and technological resources than we do", offering P.R.C. government support of its domestic semiconductor companies as the example. | narrow FY2026 10-K (filed 2026-03-11): differentiated platform IP — over 10,000 issued patents and pending applications as of 2026-01-31, plus a proven custom ASIC platform leveraging ultra-high-speed SerDes, silicon photonics, co-packaged optics and custom HBM — but Marvell itself calls its markets 'intensely competitive' with 'pricing pressures', notes customers 'have chosen to develop certain semiconductor products internally', and discloses two >=10% customers with the ten largest at 82% of FY2026 net revenue. Real, defensible IP in a concentrated, contestable customer base = narrow, not wide. https://www.sec.gov/Archives/edgar/data/1835632/000183563226000011/mrvl-20260131.htm |
| Moat type | intangibles ip What management itself names as the source of the position is a proprietary platform. The July 29, 2026 Q1 FY2026 results briefing states: 'Our leading SoC Test platform, V93000, has been widely adopted across a broad range of customers in the increasingly complex AI semiconductor markets, where advanced packaging technologies including GPUs, ASICs, and CPUs are being adopted. It serves as a key foundation that underpins our competitive advantage.' The 84th-term report shows the spend behind it: R&D was approximately ¥71.4 billion in FY2024 and ¥78.1 billion in FY2025, 'The number of employees in its research and development division is approximately 30% of the Advantest workforce', and in the Test System Business Segment 'a large and ongoing investment in research and development is necessary in order to maintain market competitiveness'. Its stated IP mitigation is that 'Advantest strategically and proactively files patent applications during product development and prior to product shipment'. | cost scale The advantage the 20-F actually claims is unit economics from volume, not lock-in: specialization and "economies of scale by providing services to a large base of customers", high capacity utilization spreading "relatively high fixed costs", and equipment that lasts longer because of the breadth of the order book. Capital intensity reinforces it — the filing says "semiconductor businesses are capital intensive and require significant investment in expensive equipment manufactured by a limited number of vendors", with the equipment market itself "characterized by intense demand, limited supply, and long delivery cycles". | intangibles ip The moat rests on hard-to-replicate mixed-signal IP: the 10-K describes the custom ASIC platform built on ultra-high-speed SerDes, ARM compute, security, storage, silicon photonics and advanced packaging (die-to-die interconnects, chiplets, CPO, custom HBM), with multiple 5nm designs executed, 3nm in progress and a 2nm platform in development; a secondary switching-cost element comes from multi-year custom design wins co-developed to individual customer specifications. https://www.sec.gov/Archives/edgar/data/1835632/000183563226000011/mrvl-20260131.htm |
| Leadership | clear leader The 84th-term report discloses Advantest's tester-market share at 65% in CY2025, up from 58% in CY2024, and carries the same 65% among its disclosed management metrics against a target of '58% or more'; the filing defines it as Advantest's semiconductor tester sales over a market size 'estimated independently by Advantest based on certain assumptions and available information'. The July 29, 2026 briefing names the platform behind that share — V93000, 'widely adopted across a broad range of customers in the increasingly complex AI semiconductor markets'. Teradyne, Inc. heads the filing's list of principal tester competitors. | co leader The 20-F calls ASEH "a leading provider of semiconductor manufacturing services in assembly and testing" and "a market leader in SiP technologies from design to assembly with high-volume manufacturing", and says it has "established ourselves as a leader through the successful introduction of leading-edge advanced packaging solutions, which have played a pivotal role in bringing advanced ASIC and HBM products to the marketplace" — but the hedged "we believe we are among the leaders in such packaging processes and technologies", alongside named consolidating rivals (Jiangsu Changjiang Electronics Technology/STATS ChipPAC, Amkor/J-Devices, Tianshui Huatian Technology/Unisem) and TSMC's InFO, describes shared rather than sole leadership. | co leader Leader in its optics niche, #2 in custom silicon: ~60% of high-end PAM4 DSP share (36kr, 2026-06-27, https://eu.36kr.com/en/p/3870758441178373) but an estimated 20-25% of custom AI ASIC design services versus Broadcom's ~70% (hashrateindex, 2026-05-13, https://hashrateindex.com/blog/design-partners-ai-asic-market-part-2/) — net, a co-leader in AI data-center connectivity/custom silicon behind Broadcom overall. |
| Pricing power | strong Q1 FY2026 gross profit was ¥255,553 million on net sales of ¥367,473 million, and the July 29, 2026 briefing states the resulting figure itself: 'Gross margin reached 69.5%', with 'an operating margin of 51.7%'. Management attributes that level to 'a favorable sales mix and limited inventory valuation losses amid the robust demand environment', not to price, and guides FY2026 full-year gross margin to 66–67% and operating margin to 49.4% after incorporating 'the impact of higher component costs, particularly for memory-related components'. FY2025 closed at a 44.2% operating margin, up 14.9 points year on year, on sales up 44.7%. | weak The 20-F states the industry has "a general trend toward declining prices for products and services of a given technology over time" and that ASEH's own "average selling prices of our packaging and testing services have experienced sharp declines" under "intense price competition". FY2025 consolidated gross margin was 17.7% (up from 16.3%), and management attributes the gain to "higher packaging and testing revenue mix and higher factory utilization" rather than price; the EMS half earned a 9.2% gross margin on raw-material costs equal to 78.7% of EMS revenue, and the five largest customers supplied 46.5% of 2025 operating revenues. | moderate The 10-K characterizes Marvell's markets as having 'pricing pressures' and intensifying competition (https://www.sec.gov/Archives/edgar/data/1835632/000183563226000011/mrvl-20260131.htm), yet the Q1 FY2027 release reports 52.1% GAAP / 58.9% non-GAAP gross margin on record revenue (https://www.sec.gov/Archives/edgar/data/1835632/000183563226000014/q127_8kx522026ex-991.htm) — differentiated-IP margins, tempered by hyperscaler buyer power. |
| Summary | Advantest sells the test step that certifies silicon before it ships, and its position there is disclosed rather than inferred: its own tester-market-share metric moved from 58% in CY2024 to 65% in CY2025 (84th-term Annual Securities Report), against a market size the filing says Advantest estimates itself. The lead is concentrated in SoC test — the July 29, 2026 briefing calls V93000 'our leading SoC Test platform' and 'a key foundation that underpins our competitive advantage' — and the customer base runs straight into the AI chain: NVIDIA International, Inc. was ¥228,273 million, or 20.2%, of FY2025 consolidated net sales, having been below the filing's 10% disclosure threshold the prior year, with Taiwan Semiconductor Manufacturing Co., Ltd. at ¥124,922 million, or 11.1%. Economics moved with it: FY2025 operating margin was 44.2%, up 14.9 points, and Q1 FY2026 gross margin reached 69.5%, which management attributes to 'a favorable sales mix and limited inventory valuation losses amid the robust demand environment' rather than to price. The counterweights sit in the same documents. The 84th-term report's customer-trust risk factor warns that if Advantest fails to meet expectations on ramp-up and post-sales service, 'the maintenance or expansion of Advantest's market share may be constrained'; it names separate competitor sets in test handlers (Hon. Precision, CCTech, Cohu, TechWing) and device interfaces (TSE, ISC, BeLINK) where no share is disclosed at all; and the July 29, 2026 briefing guides FY2026 full-year gross margin down to 66–67% having 'incorporated the impact of higher component costs, particularly for memory-related components, mainly in the second half of the fiscal year'. | ASEH sells turnkey assembly and test at a scale most captive IDM lines cannot match: the 20-F says it is "involved in all stages of the semiconductor manufacturing process except circuit design and wafer fabrication", and leans on Taiwan, "currently the largest center for outsourced semiconductor manufacturing in the world", plus a "strategic alliance with TSMC", to sit next to the foundries its customers already use. The durable part is cost position from utilization, not customer capture — the filing concedes customers multi-source and that foundries are moving into advanced packaging from above. | Marvell is a fabless data-infrastructure silicon supplier whose center of gravity has shifted decisively to the AI data center: the data center end market was $6,100.3M, 74% of FY2026 revenue, up from 40% two fiscal years earlier (FY2026 10-K). Its strongest position is electro-optics — in high-end PAM4 optical DSPs for 400G+ transceivers it holds roughly 60% share on Inphi-inherited SerDes/FEC IP, with Broadcom above 30%, the two together over 90% (36kr, 2026-06-27). In custom AI silicon it is the structural #2 design partner at an estimated 20-25% of the custom AI ASIC design-services market versus Broadcom's ~70%, anchored by AWS Trainium and Microsoft Maia wins (hashrateindex, 2026-05-13). The Q1 FY2027 release (2026-05-27) shows the flywheel turning — record $2.418B revenue (+28% YoY), Q2 guided to $2.7B mid-point (+35% YoY), management citing 'exceptional AI-related bookings' across 800G/1.6T optics, 51.2T switches, CPO/NPO and custom XPU — and the Celestial AI (Photonic Fabric) and XConn (PCIe/CXL switching) acquisitions closed in February 2026 extend the interconnect moat toward scale-up fabrics. The offsets that keep the moat narrow are in Marvell's own filing: intense competition (AMD, Alchip, Astera, Ayar, Broadcom, Credo, GUC, Lightmatter and others), hyperscaler in-housing risk, and heavy customer concentration. |
| Chain position | Back-end capital equipment: Advantest's testers certify devices after fabrication, and the 84th-term report's FY2025 major-customer table puts NVIDIA International, Inc. at 20.2% and Taiwan Semiconductor Manufacturing Co., Ltd. at 11.1% of consolidated net sales, with overseas sales 97.8% of the total. | Back-end contractor to the AI silicon chain: the 20-F ties its FOCoS, FOCoS-Bridge and 2.5D/3D lines to "ASICs and HBM for HPC, networking, server and AI/ML applications" and "AI accelerators for AI training", and warns that a slowdown in AI demand would leave "lower utilization rates for our specialized equipment". | Fabless supplier spanning 'data center core to network edge': it sits between hyperscaler AI compute (custom XPU/XPU-attach ASICs) and the optical layer (PAM4/coherent DSPs, CPO/LPO, DCI, AEC, PCIe retimers), outsourcing fabrication to independent CMOS foundries; the Feb-2026 Celestial AI and XConn acquisitions push it further into scale-up photonic fabric and PCIe/CXL/UALink switching (FY2026 10-K, https://www.sec.gov/Archives/edgar/data/1835632/000183563226000011/mrvl-20260131.htm). |
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| Long-horizon vote | +0.42 at weight 0.20 · swarm neutral Editorial prior, not backtested. | +0.05 at weight 0.20 · swarm neutral Editorial prior, not backtested. | +0.13 at weight 0.20 · swarm bullish Editorial prior, not backtested. |