Compare moats
Up to three covered companies, band by band. Every call is a curated editorial judgment, never a disclosed figure — and every band carries its cited basis.
| Advantest | ASE Technology Holding | United Microelectronics Corporation | |
|---|---|---|---|
| Moat rating | wide A disclosed share that rose while margin expanded. The FY2025 Annual Securities Report and Business Report (84th term, filed 2026-06-26) lists as FY2025 progress: 'Further expanded our market share in the semiconductor tester (ATE) market (CY2024: 58%; CY2025: 65%)', earned on net sales of ¥1,128,610 million at an operating income to net sales ratio of 44.2%, 'an increase of 14.9 percentage points from the previous fiscal year'. The share is a company metric and the filing says so — 'the ratio of Advantest's semiconductor tester sales to the overall size of the semiconductor tester market', where 'The semiconductor tester market size is estimated independently by Advantest based on certain assumptions and available information'. The same filing names seven principal tester competitors (Teradyne, Inc., CCTech, Accotest, YC Corp., Cohu, Inc., UniTest Co., Ltd. and EXICON Ltd.), so this is a lead held against a named field rather than an empty one. | narrow The FY2025 20-F argues ASEH out-competes IDM in-house lines because serving "a large base of customers across a wide range of products" lets it "reduce costs and shorten production cycles through high-capacity utilization and process expertise" and gives its equipment "a longer useful life" — a real but bounded edge, since the same filing calls the global packaging and testing market "highly competitive", notes "most of our customers obtain services from more than one source", flags foundry encroachment ("TSMC has offered advanced packaging technologies such as integrated fan-out"), and warns that "some of our competitors may have superior financial, marketing, manufacturing, research and development and technological resources than we do", offering P.R.C. government support of its domestic semiconductor companies as the example. | narrow The FY2025 20-F Competition section cuts both ways: UMC calls itself "one of the world's largest independent semiconductor foundries" with production capacity "currently among the largest of all semiconductor foundries in the world" and says it believes it competes favorably with competitors on each principal element of foundry competition, yet in the same section concedes that "[s]ome of our competitors have substantially greater production, financial, research and development and marketing resources than we have" and that "several new dedicated foundries have commenced operations and compete directly with us," whose entry is "likely to initiate a trend of competitive pricing and create potential overcapacity in legacy technology" that "may erode our profit margins." A real but bounded advantage, not a durable wide one. |
| Moat type | intangibles ip What management itself names as the source of the position is a proprietary platform. The July 29, 2026 Q1 FY2026 results briefing states: 'Our leading SoC Test platform, V93000, has been widely adopted across a broad range of customers in the increasingly complex AI semiconductor markets, where advanced packaging technologies including GPUs, ASICs, and CPUs are being adopted. It serves as a key foundation that underpins our competitive advantage.' The 84th-term report shows the spend behind it: R&D was approximately ¥71.4 billion in FY2024 and ¥78.1 billion in FY2025, 'The number of employees in its research and development division is approximately 30% of the Advantest workforce', and in the Test System Business Segment 'a large and ongoing investment in research and development is necessary in order to maintain market competitiveness'. Its stated IP mitigation is that 'Advantest strategically and proactively files patent applications during product development and prior to product shipment'. | cost scale The advantage the 20-F actually claims is unit economics from volume, not lock-in: specialization and "economies of scale by providing services to a large base of customers", high capacity utilization spreading "relatively high fixed costs", and equipment that lasts longer because of the breadth of the order book. Capital intensity reinforces it — the filing says "semiconductor businesses are capital intensive and require significant investment in expensive equipment manufactured by a limited number of vendors", with the equipment market itself "characterized by intense demand, limited supply, and long delivery cycles". | intangibles ip The 20-F states plainly that "Our success depends on our ability to obtain patents, licenses and other intellectual property (IP) rights covering our production processes and activities," and reports more than 16,700 patents worldwide as of December 31, 2025, of which more than 7,490 are in the U.S., 623 domestic and foreign patents granted in 2025 alone, NT$17,725 million of R&D (7.5% of operating revenues) and 1,591 R&D professionals. The Competition section names where UMC believes it wins: it competes favorably "particularly [on] our technical competence and research and development capabilities." The proprietary specialty-process library, not scale or a network, is the cited source of the advantage. |
| Leadership | clear leader The 84th-term report discloses Advantest's tester-market share at 65% in CY2025, up from 58% in CY2024, and carries the same 65% among its disclosed management metrics against a target of '58% or more'; the filing defines it as Advantest's semiconductor tester sales over a market size 'estimated independently by Advantest based on certain assumptions and available information'. The July 29, 2026 briefing names the platform behind that share — V93000, 'widely adopted across a broad range of customers in the increasingly complex AI semiconductor markets'. Teradyne, Inc. heads the filing's list of principal tester competitors. | co leader The 20-F calls ASEH "a leading provider of semiconductor manufacturing services in assembly and testing" and "a market leader in SiP technologies from design to assembly with high-volume manufacturing", and says it has "established ourselves as a leader through the successful introduction of leading-edge advanced packaging solutions, which have played a pivotal role in bringing advanced ASIC and HBM products to the marketplace" — but the hedged "we believe we are among the leaders in such packaging processes and technologies", alongside named consolidating rivals (Jiangsu Changjiang Electronics Technology/STATS ChipPAC, Amkor/J-Devices, Tianshui Huatian Technology/Unisem) and TSMC's InFO, describes shared rather than sole leadership. | fast follower UMC describes a deliberate follow strategy in the 20-F: it intends "to avoid investments in technologies that do not present commercial potential for volume production" and believes "it is beneficial to defer investment in premature equipment needed to claim the earliest advanced technology and instead to purchase more advanced and less expensive versions of such equipment from vendors who design this equipment based on pre-production lessons learned from the earliest technology." The node ladder bears this out: the most advanced process in production in 2025 is Fab 12A's 0.014 micron, wafers at 14 nanometers and under rounded to 0.0% of wafer sales in each of 2023, 2024 and 2025, and the next rung — UMC's own 12nm FinFET process, which Intel replicated in 2025 "based on our electrical design rules and UMC-verified process" for manufacture at its Arizona fab — is only "expected to begin in 2027." |
| Pricing power | strong Q1 FY2026 gross profit was ¥255,553 million on net sales of ¥367,473 million, and the July 29, 2026 briefing states the resulting figure itself: 'Gross margin reached 69.5%', with 'an operating margin of 51.7%'. Management attributes that level to 'a favorable sales mix and limited inventory valuation losses amid the robust demand environment', not to price, and guides FY2026 full-year gross margin to 66–67% and operating margin to 49.4% after incorporating 'the impact of higher component costs, particularly for memory-related components'. FY2025 closed at a 44.2% operating margin, up 14.9 points year on year, on sales up 44.7%. | weak The 20-F states the industry has "a general trend toward declining prices for products and services of a given technology over time" and that ASEH's own "average selling prices of our packaging and testing services have experienced sharp declines" under "intense price competition". FY2025 consolidated gross margin was 17.7% (up from 16.3%), and management attributes the gain to "higher packaging and testing revenue mix and higher factory utilization" rather than price; the EMS half earned a 9.2% gross margin on raw-material costs equal to 78.7% of EMS revenue, and the five largest customers supplied 46.5% of 2025 operating revenues. | weak The 20-F claims no premium — "our current level of pricing is comparable to that of other leading foundries in each respective geometry" — and reports that 2025 average selling price declined 5.4%, driving gross margin down from 32.6% in 2024 to 29.0% in 2025 even as 12-inch-equivalent wafer shipments rose from 3,446 thousand to 3,870 thousand and average capacity utilization improved from 68.7% to 75.2%. It also notes that "[p]rices for wafers of a given level of technology generally decline over the processing technology life cycle." |
| Summary | Advantest sells the test step that certifies silicon before it ships, and its position there is disclosed rather than inferred: its own tester-market-share metric moved from 58% in CY2024 to 65% in CY2025 (84th-term Annual Securities Report), against a market size the filing says Advantest estimates itself. The lead is concentrated in SoC test — the July 29, 2026 briefing calls V93000 'our leading SoC Test platform' and 'a key foundation that underpins our competitive advantage' — and the customer base runs straight into the AI chain: NVIDIA International, Inc. was ¥228,273 million, or 20.2%, of FY2025 consolidated net sales, having been below the filing's 10% disclosure threshold the prior year, with Taiwan Semiconductor Manufacturing Co., Ltd. at ¥124,922 million, or 11.1%. Economics moved with it: FY2025 operating margin was 44.2%, up 14.9 points, and Q1 FY2026 gross margin reached 69.5%, which management attributes to 'a favorable sales mix and limited inventory valuation losses amid the robust demand environment' rather than to price. The counterweights sit in the same documents. The 84th-term report's customer-trust risk factor warns that if Advantest fails to meet expectations on ramp-up and post-sales service, 'the maintenance or expansion of Advantest's market share may be constrained'; it names separate competitor sets in test handlers (Hon. Precision, CCTech, Cohu, TechWing) and device interfaces (TSE, ISC, BeLINK) where no share is disclosed at all; and the July 29, 2026 briefing guides FY2026 full-year gross margin down to 66–67% having 'incorporated the impact of higher component costs, particularly for memory-related components, mainly in the second half of the fiscal year'. | ASEH sells turnkey assembly and test at a scale most captive IDM lines cannot match: the 20-F says it is "involved in all stages of the semiconductor manufacturing process except circuit design and wafer fabrication", and leans on Taiwan, "currently the largest center for outsourced semiconductor manufacturing in the world", plus a "strategic alliance with TSMC", to sit next to the foundries its customers already use. The durable part is cost position from utilization, not customer capture — the filing concedes customers multi-source and that foundries are moving into advanced packaging from above. | UMC's durable asset is a proprietary mature- and specialty-node process library — 55/40/28/22nm embedded memory for MCU and automotive, 55/40/28/22/14nm embedded high-voltage for display drivers, 110/55nm BCD for power management, 55/28/22nm BSI-CSI for image sensors and 110/90/55/40nm RF-SOI — backed by more than 16,700 patents worldwide at end-2025 and 7.5% of revenue spent on R&D. That library keeps a concentrated customer base qualified into UMC's fabs (top ten customers were 57.0% of 2025 operating revenues; Texas Instruments, Intel, MediaTek, Realtek and Novatek are named as primary customers). What it does not buy is price: 2025 average selling price fell 5.4% and gross margin fell from 32.6% to 29.0%, while the filing warns that new dedicated foundries are likely to initiate competitive pricing and overcapacity in legacy technology. |
| Chain position | Back-end capital equipment: Advantest's testers certify devices after fabrication, and the 84th-term report's FY2025 major-customer table puts NVIDIA International, Inc. at 20.2% and Taiwan Semiconductor Manufacturing Co., Ltd. at 11.1% of consolidated net sales, with overseas sales 97.8% of the total. | Back-end contractor to the AI silicon chain: the 20-F ties its FOCoS, FOCoS-Bridge and 2.5D/3D lines to "ASICs and HBM for HPC, networking, server and AI/ML applications" and "AI accelerators for AI training", and warns that a slowdown in AI demand would leave "lower utilization rates for our specialized equipment". | Mature- and specialty-node wafer supplier: 2025 wafer sales were 41.4% communication, 30.6% consumer and 11.6% computer, with the AI tie indirect — 2.5D silicon interposers with deep-trench capacitors shipped to major customers for HPC, cloud computing and LLM applications. |
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| Long-horizon vote | +0.42 at weight 0.20 · swarm neutral Editorial prior, not backtested. | +0.05 at weight 0.20 · swarm neutral Editorial prior, not backtested. | -0.01 at weight 0.20 · swarm neutral Editorial prior, not backtested. |